!153 [sync] PR-149: Revert some v8 roll
From: @openeuler-sync-bot Reviewed-by: @lyn1001 Signed-off-by: @lyn1001
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0002-Revert-deps-V8-tagged.patch
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141
0002-Revert-deps-V8-tagged.patch
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From 1dd706c8c473b31bcef269d6ecde6fc72200ce89 Mon Sep 17 00:00:00 2001
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From: Eustace <eusteuc@outlook.com>
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Date: Mon, 18 Mar 2024 09:31:46 +0800
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Subject: [PATCH] Revert "deps: V8: cherry-pick 13192d6e10fa"
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"Tagged" is at an unfinished state here yet.
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This reverts commit bc2ebb972b34f54e042de9636e7451d2526436a9.
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---
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deps/v8/src/builtins/riscv/builtins-riscv.cc | 2 +-
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deps/v8/src/codegen/riscv/assembler-riscv-inl.h | 16 ++++++++--------
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deps/v8/src/codegen/riscv/assembler-riscv.h | 2 +-
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deps/v8/src/execution/riscv/simulator-riscv.cc | 8 ++++----
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.../regexp/riscv/regexp-macro-assembler-riscv.cc | 2 +-
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5 files changed, 15 insertions(+), 15 deletions(-)
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diff --git a/deps/v8/src/builtins/riscv/builtins-riscv.cc b/deps/v8/src/builtins/riscv/builtins-riscv.cc
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index d6091434b9..3404562785 100644
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--- a/deps/v8/src/builtins/riscv/builtins-riscv.cc
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+++ b/deps/v8/src/builtins/riscv/builtins-riscv.cc
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@@ -1512,7 +1512,7 @@ static void Generate_InterpreterEnterBytecode(MacroAssembler* masm) {
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// Set the return address to the correct point in the interpreter entry
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// trampoline.
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Label builtin_trampoline, trampoline_loaded;
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- Tagged<Smi> interpreter_entry_return_pc_offset(
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+ Smi interpreter_entry_return_pc_offset(
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masm->isolate()->heap()->interpreter_entry_return_pc_offset());
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DCHECK_NE(interpreter_entry_return_pc_offset, Smi::zero());
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diff --git a/deps/v8/src/codegen/riscv/assembler-riscv-inl.h b/deps/v8/src/codegen/riscv/assembler-riscv-inl.h
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index ca6d641e2c..55f191e6af 100644
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--- a/deps/v8/src/codegen/riscv/assembler-riscv-inl.h
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+++ b/deps/v8/src/codegen/riscv/assembler-riscv-inl.h
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@@ -128,9 +128,9 @@ Handle<HeapObject> Assembler::compressed_embedded_object_handle_at(
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}
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void Assembler::deserialization_set_special_target_at(
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- Address instruction_payload, Tagged<Code> code, Address target) {
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+ Address instruction_payload, Code code, Address target) {
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set_target_address_at(instruction_payload,
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- !code.is_null() ? code->constant_pool() : kNullAddress,
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+ !code.is_null() ? code.constant_pool() : kNullAddress,
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target);
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}
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@@ -159,13 +159,12 @@ void Assembler::deserialization_set_target_internal_reference_at(
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}
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}
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-Tagged<HeapObject> RelocInfo::target_object(PtrComprCageBase cage_base) {
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+HeapObject RelocInfo::target_object(PtrComprCageBase cage_base) {
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DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
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if (IsCompressedEmbeddedObject(rmode_)) {
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- return HeapObject::cast(
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- Tagged<Object>(V8HeapCompressionScheme::DecompressTagged(
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- cage_base,
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- Assembler::target_compressed_address_at(pc_, constant_pool_))));
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+ return HeapObject::cast(Object(V8HeapCompressionScheme::DecompressTagged(
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+ cage_base,
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+ Assembler::target_compressed_address_at(pc_, constant_pool_))));
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} else {
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return HeapObject::cast(
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Object(Assembler::target_address_at(pc_, constant_pool_)));
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@@ -187,7 +186,8 @@ Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
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}
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}
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-void RelocInfo::set_target_object(Tagged<HeapObject> target,
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+void RelocInfo::set_target_object(Heap* heap, HeapObject target,
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+ WriteBarrierMode write_barrier_mode,
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ICacheFlushMode icache_flush_mode) {
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DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
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if (IsCompressedEmbeddedObject(rmode_)) {
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diff --git a/deps/v8/src/codegen/riscv/assembler-riscv.h b/deps/v8/src/codegen/riscv/assembler-riscv.h
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index bcd5a62d32..ed222b52d6 100644
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--- a/deps/v8/src/codegen/riscv/assembler-riscv.h
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+++ b/deps/v8/src/codegen/riscv/assembler-riscv.h
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@@ -286,7 +286,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase,
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// This is for calls and branches within generated code. The serializer
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// has already deserialized the lui/ori instructions etc.
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inline static void deserialization_set_special_target_at(Address location,
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- Tagged<Code> code,
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+ Code code,
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Address target);
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// Get the size of the special target encoded at 'instruction_payload'.
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diff --git a/deps/v8/src/execution/riscv/simulator-riscv.cc b/deps/v8/src/execution/riscv/simulator-riscv.cc
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index 052a2d67dd..9582db4896 100644
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--- a/deps/v8/src/execution/riscv/simulator-riscv.cc
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+++ b/deps/v8/src/execution/riscv/simulator-riscv.cc
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@@ -1781,7 +1781,7 @@ void RiscvDebugger::Debug() {
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sreg_t value;
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StdoutStream os;
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if (GetValue(arg1, &value)) {
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- Tagged<Object> obj(value);
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+ Object obj(value);
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os << arg1 << ": \n";
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#ifdef DEBUG
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obj.Print(os);
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@@ -1830,7 +1830,7 @@ void RiscvDebugger::Debug() {
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PrintF(" 0x%012" PRIxPTR " : 0x%016" REGIx_FORMAT
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" %14" REGId_FORMAT " ",
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reinterpret_cast<intptr_t>(cur), *cur, *cur);
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- Tagged<Object> obj(*cur);
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+ Object obj(*cur);
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Heap* current_heap = sim_->isolate_->heap();
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if (obj.IsSmi() ||
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IsValidHeapObject(current_heap, HeapObject::cast(obj))) {
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@@ -4692,7 +4692,7 @@ bool Simulator::DecodeRvvVS() {
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Builtin Simulator::LookUp(Address pc) {
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for (Builtin builtin = Builtins::kFirst; builtin <= Builtins::kLast;
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++builtin) {
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- if (builtins_.code(builtin)->contains(isolate_, pc)) return builtin;
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+ if (builtins_.code(builtin).contains(isolate_, pc)) return builtin;
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}
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return Builtin::kNoBuiltinId;
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}
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@@ -4709,7 +4709,7 @@ void Simulator::DecodeRVIType() {
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if (builtin != Builtin::kNoBuiltinId) {
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auto code = builtins_.code(builtin);
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if ((rs1_reg() != ra || imm12() != 0)) {
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- if ((Address)get_pc() == code->instruction_start()) {
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+ if ((Address)get_pc() == code.InstructionStart()) {
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sreg_t arg0 = get_register(a0);
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sreg_t arg1 = get_register(a1);
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sreg_t arg2 = get_register(a2);
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diff --git a/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc b/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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index 72f89767eb..4063b4b3d2 100644
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--- a/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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+++ b/deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc
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@@ -1211,7 +1211,7 @@ static T* frame_entry_address(Address re_frame, int frame_offset) {
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int64_t RegExpMacroAssemblerRISCV::CheckStackGuardState(Address* return_address,
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Address raw_code,
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Address re_frame) {
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- Tagged<InstructionStream> re_code = InstructionStream::cast(Object(raw_code));
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+ InstructionStream re_code = InstructionStream::cast(Object(raw_code));
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return NativeRegExpMacroAssembler::CheckStackGuardState(
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frame_entry<Isolate*>(re_frame, kIsolateOffset),
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static_cast<int>(frame_entry<int64_t>(re_frame, kStartIndexOffset)),
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--
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2.41.0
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@ -1,4 +1,4 @@
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%global baserelease 1
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%global baserelease 2
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%{?!_pkgdocdir:%global _pkgdocdir %{_docdir}/%{name}-%{version}}
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%{?!_pkgdocdir:%global _pkgdocdir %{_docdir}/%{name}-%{version}}
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%global nodejs_epoch 1
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%global nodejs_epoch 1
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%global nodejs_major 20
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%global nodejs_major 20
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@ -80,6 +80,7 @@ Source3: https://github.com/unicode-org/icu/releases/download/release-%{icu_majo
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Source4: nodejs_native.attr
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Source4: nodejs_native.attr
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Patch0: 0001-Use-system-uv-zlib.patch
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Patch0: 0001-Use-system-uv-zlib.patch
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Patch1: 0002-Revert-deps-V8-tagged.patch
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BuildRequires: python3-devel python3-setuptools make
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BuildRequires: python3-devel python3-setuptools make
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BuildRequires: zlib-devel python3-jinja2
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BuildRequires: zlib-devel python3-jinja2
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@ -397,6 +398,9 @@ NODE_PATH=%{buildroot}%{_prefix}/lib/node_modules:%{buildroot}%{_prefix}/lib/nod
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%{_pkgdocdir}/npm/docs
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%{_pkgdocdir}/npm/docs
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%changelog
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%changelog
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* Mon Mar 18 2024 Eustace <eusteuc@outlook.com> - 1:20.11.1-2
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- Revert some v8 roll
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* Mon Feb 19 2024 wangkai <13474090681@163.com> - 1:20.11.1-1
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* Mon Feb 19 2024 wangkai <13474090681@163.com> - 1:20.11.1-1
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- Update to 20.11.1
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- Update to 20.11.1
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- Fix CVE-2023-46809 CVE-2024-21896 CVE-2024-22019 CVE-2024-21892 CVE-2024-24758 CVE-2024-22025
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- Fix CVE-2023-46809 CVE-2024-21896 CVE-2024-22019 CVE-2024-21892 CVE-2024-24758 CVE-2024-22025
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