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10 Commits

Author SHA1 Message Date
openeuler-ci-bot
b440e8aee6
!19 add PIE compiler option
From: @chen-jan 
Reviewed-by: @caodongxia 
Signed-off-by: @caodongxia
2023-06-07 09:25:42 +00:00
chen-jan
8a0b39e06a add PIE compiler option 2023-06-07 17:18:01 +08:00
openeuler-ci-bot
e981916589
!15 disable sse for loongarch64
From: @zhangwenlong01 
Reviewed-by: @yangzhao_kl 
Signed-off-by: @yangzhao_kl
2023-03-07 15:03:52 +00:00
Wenlong Zhang
90cb074656 disable sse for loongarch64
Signed-off-by: Wenlong Zhang <zhangwenlong@loongson.cn>
2023-03-04 14:26:56 +08:00
openeuler-ci-bot
d27052dcbd
!13 use %{_vendor} instead of openeuler hardcode
From: @wonleing 
Reviewed-by: @gitee-cmd, @shinwell_hu 
Signed-off-by: @shinwell_hu
2022-12-29 09:13:13 +00:00
Leon Wang
5f918ed382 Fix rpm-config hard code problem 2022-12-22 11:27:58 +08:00
openeuler-ci-bot
d45212daaa
!7 修复编译失败问题
From: @caodongxia 
Reviewed-by: @cherry530, @shinwell_hu 
Signed-off-by: @cherry530, @shinwell_hu
2022-07-25 03:18:35 +00:00
caodongxia
07d57f29ac Usepython3_sitearchinsteadofpython3_sitelib 2022-07-25 10:40:13 +08:00
openeuler-ci-bot
c481d72374
!6 统一spec文件的License名称规范
From: @lauk001 
Reviewed-by: @shinwell_hu 
Signed-off-by: @shinwell_hu
2022-05-18 08:34:39 +00:00
lauk
0221fbd6bf License compliance rectification 2022-05-18 11:10:15 +08:00
2 changed files with 47 additions and 6 deletions

View File

@ -0,0 +1,24 @@
From 1c07b6c0a9dd62493b7bece0ff9dba1c1606fe32 Mon Sep 17 00:00:00 2001
From: Wenlong Zhang <zhangwenlong@loongson.cn>
Date: Wed, 8 Feb 2023 15:47:15 +0800
Subject: [PATCH] disable sse for loongarch64
---
xgboost/make/config.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xgboost/make/config.mk b/xgboost/make/config.mk
index 6780eb1..ff2f21b 100644
--- a/xgboost/make/config.mk
+++ b/xgboost/make/config.mk
@@ -43,7 +43,7 @@ USE_AZURE = 0
# Settings for power and arm arch
#----------------------------
ARCH := $(shell uname -a)
-ifneq (,$(filter $(ARCH), armv6l armv7l powerpc64le ppc64le aarch64 riscv64))
+ifneq (,$(filter $(ARCH), armv6l armv7l powerpc64le ppc64le aarch64 riscv64 loongarch64))
USE_SSE=0
else
USE_SSE=1
--
2.33.0

View File

@ -3,9 +3,9 @@
Name: python-%{pypi_name}
Version: 0.90
Release: 4
Release: 9
Summary: Scalable, Portable and Distributed Gradient Boosting Library
License: Apache-2
License: Apache-2.0
URL: https://github.com/dmlc/xgboost
Source0: https://files.pythonhosted.org/packages/96/84/4e2cae6247f397f83d8adc5c2a2a0c5d7d790a14a4c7400ff6574586f589/%{pypi_name}-%{version}.tar.gz
BuildRequires: python3-devel gcc-c++
@ -14,9 +14,10 @@ Requires: openblas openblas-serial openblas-threads
Requires: python3-numpy python3-numpy-f2py python3-scipy
Requires: fontconfig fontpackages-filesystem
Requires: libX11 libXau libXft libXrender libxcb
Requires: openEuler-rpm-config
Requires: %{_vendor}-rpm-config
Requires: python3-devel python3-rpm-generators tk
Patch01: disable-sse-for-riscv.patch
Patch01: disable-sse-for-riscv.patch
Patch02: disable-sse-for-loongarch64.patch
%global _description \
XGBoost is an optimized distributed gradient boosting library designed to be \
@ -40,6 +41,7 @@ Summary: %{summary}
%build
pushd %{pypi_name}
sed -i "s/(PLUGIN_CFLAGS)/(PLUGIN_CFLAGS) -fPIE -pie/g" Makefile
%make_build
popd
%py3_build
@ -60,10 +62,25 @@ find %{buildroot} -name "*.py" -exec sed -i -r 's!/usr/bin/python(\s|$)!/usr/bin
%{_bindir}/xgboost
/usr/xgboost
%doc README.rst
%{python3_sitelib}/%{pypi_name}/
%{python3_sitelib}/%{pypi_name}-*.egg-info/
%{python3_sitearch}/%{pypi_name}/
%{python3_sitearch}/%{pypi_name}-*.egg-info/
%changelog
* Wed Jun 07 2023 chenchen <chen_aka_jan@163.com> - 0.90-9
- add PIE compiler option
* Sat Mar 04 2023 Wenlong Zhang<zhangwenlong@loongson.cn> - 0.90-8
- disable sse for loongarch64
* Thu Dec 22 2022 wanglin <wangl29@chinatelecom.cn> - 0.90-7
- Fix rpm-config hard code problem
* Mon Jul 25 2022 caodongxia <caodongxia@h-partners.com> - 0.90-6
- Use python3_sitearch instead of python3_sitelib
* Wed May 18 2022 liukuo <liukuo@kylinos.cn> - 0.90-5
- License compliance rectification
* Mon Jan 24 2022 lvxiaoqian <xiaoqian@nj.iscas.ac.cn> - 0.90-4
- do not use sse for riscv