From afe05089a4284acef30a97fb88435fea46e29d8e Mon Sep 17 00:00:00 2001
From: zhouli57 <zhouli57@huawei.com>
Date: Fri, 11 Mar 2022 14:22:07 +0800
Subject: [PATCH 3/8] arm: use the HighPcieEcam region

We use 16MB ECAM region on arm, which only support 16 pcie buses, and
now we use the high ECAM region, which can support 256 pcie buses.

Signed-off-by: zhouli57 <zhouli57@huawei.com>
---
 machine/src/standard_vm/aarch64/mod.rs | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/machine/src/standard_vm/aarch64/mod.rs b/machine/src/standard_vm/aarch64/mod.rs
index 1e6fc6c..ddf8a41 100644
--- a/machine/src/standard_vm/aarch64/mod.rs
+++ b/machine/src/standard_vm/aarch64/mod.rs
@@ -141,8 +141,8 @@ impl StdMachine {
             sysbus,
             pci_host: Arc::new(Mutex::new(PciHost::new(
                 &sys_mem,
-                MEM_LAYOUT[LayoutEntryType::PcieEcam as usize],
-                MEM_LAYOUT[LayoutEntryType::PcieMmio as usize],
+                MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize],
+                MEM_LAYOUT[LayoutEntryType::HighPcieMmio as usize],
             ))),
             boot_source: Arc::new(Mutex::new(vm_config.clone().boot_source)),
             vm_state: Arc::new((Mutex::new(KvmVmState::Created), Condvar::new())),
@@ -221,14 +221,14 @@ impl StdMachineOps for StdMachine {
         let root_bus = Arc::downgrade(&self.pci_host.lock().unwrap().root_bus);
         let mmconfig_region_ops = PciHost::build_mmconfig_ops(self.pci_host.clone());
         let mmconfig_region = Region::init_io_region(
-            MEM_LAYOUT[LayoutEntryType::PcieEcam as usize].1,
+            MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize].1,
             mmconfig_region_ops,
         );
         self.sys_mem
             .root()
             .add_subregion(
                 mmconfig_region,
-                MEM_LAYOUT[LayoutEntryType::PcieEcam as usize].0,
+                MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize].0,
             )
             .chain_err(|| "Failed to register ECAM in memory space.")?;
 
@@ -645,9 +645,9 @@ impl EventLoopManager for StdMachine {
 //
 // * `fdt` - Flatted device-tree blob where node will be filled into.
 fn generate_pci_host_node(fdt: &mut FdtBuilder) -> util::errors::Result<()> {
-    let pcie_ecam_base = MEM_LAYOUT[LayoutEntryType::PcieEcam as usize].0;
-    let pcie_ecam_size = MEM_LAYOUT[LayoutEntryType::PcieEcam as usize].1;
-    let pcie_buses_num = MEM_LAYOUT[LayoutEntryType::PcieEcam as usize].1 >> 20;
+    let pcie_ecam_base = MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize].0;
+    let pcie_ecam_size = MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize].1;
+    let pcie_buses_num = MEM_LAYOUT[LayoutEntryType::HighPcieEcam as usize].1 >> 20;
     let node = format!("pcie@{:x}", pcie_ecam_base);
     let pci_node_dep = fdt.begin_node(&node)?;
     fdt.set_property_string("compatible", "pci-host-ecam-generic")?;
-- 
2.20.1

